1. Field of the Invention
The present invention generally relates to a rectangular wave generator for generating a rectangular wave from an analog input signal, and more particularly to a rectangular wave generator including a hysteresis comparator in which an analog input signal is sliced at a predetermined voltage and an output signal of a rectangular wave is fed back to the input of the hysteresis comparator. Further, the present invention is concerned with a disk storage apparatus using such a rectangular wave generator, such as an optical disk apparatus or a magneto-optic disk apparatus.
2. Description of the Prior Art
An optical disk apparatus or a magneto-optic disk apparatus has an advantage of a large storage capacity, and is attractive for use as an external storage apparatus. Hereinafter, an optical disk apparatus is referred to as a disk apparatus including a magneto-optic disk apparatus.
In a conventional optical disk apparatus, a tracking error signal is generated from a light reflected by an optical disk, and is sliced at a predetermined voltage level by means of a comparator. An output signal of the comparator serves as a track crossing signal used for detecting the track position and the seek speed in order to control the seek operation. Such a comparator should generate the track crossing signals with high precision even if a noise signal and/or an offset signal is superimposed on the tracking error signal.
FIG. 1 is a block diagram of a conventional optical disk apparatus, FIGS. 2A, 2B and 2C are diagrams showing a tracking zero-cross signal, and FIG. 3A and 3B are diagrams showing a track crossing operation. Referring to FIG. 1, the conventional optical disk apparatus comprises an optical head 3, and a motor 1, such as a voice coil motor (VCM). The optical head 3 projects a light beam onto an optical disk (magnet-optic disk) 2. The motor 1 moves the optical head 3 in the radial directions of the optical disk 2.
As shown in FIG. 2A, the optical disk 2 has a track disposed between guide grooves. A light beam emitted from the optical head 3 and reflected by the optical disk 2 is received by a two-divided photodetector 30 via an objective lens of the optical head 3, as shown in FIG. 2B. Two detection signals A and B from two divided light receiving surfaces of the photodetector 30 are applied to a tracking error signal (TES) generating circuit 10 shown in FIG. 1, which generates a tracking error signal TES indicating the difference between the two detection signals A and B. An offset compensation circuit 11 executes an offset compensation operation on the tracking error signal TES. A phase compensation circuit 12 compensates for the phases of high-frequency components of an output signal of the offset compensation circuit 11. An output signal of the phase compensation circuit 12 is applied to a power amplifier 16 via a tracking servo switch 13 and an adder 14. The power amplifier 16 drives a tracking actuator coil (not shown) for moving the objective lens 31 in the track directions, so that the light beam follows the target track.
The tracking error signal TES generated by the TES generator 10 has a sine wave having a cycle corresponding to an operation in which the light beam crosses a track. The tracking error signal TES is applied to a high-speed comparator 15, in which the signal TES is sliced at a level of zero. In this manner, as shown in FIG. 2A, the high-speed comparator 15 generates a tracking zero-cross signal TZC. A track counter 17 counts the number of pulses of the tracking zero-cross signal TZC. A controller (MPU) 4 detects the position and speed of the optical head 3 from the counter value of the track counter 17, which is periodically read in response to an output signal of an internal timer TM. Then, the controller 4 controls, on the basis of the position and speed of the optical head 3, the voice coil motor 1 via a digital-to-analog (D/A) converter (DAC2) 22, and a power amplifier 24.
A lens position signal generating circuit 18 generates a lens position signal LPOS indicating the position of the objective lens 81 of the optical head 3. A phase compensation circuit 19 compensates for the phases of high-frequency components of the lens position signal LPOS. The controller 4 turns ON switch 21 during a seek operation, and thereby the lens position signal LPOS from the phase compensation circuit 19 is applied to the power amplifier 16. In this manner, the objective lens 31 is locked.
A digital-to-analog converter (DAC1) converts a tracking actuator control signal generated by the controller 4 into an analog signal at the end of the seek operation. The analog tracking actuator control signal from the D/A converter 20 is applied to the adder 14, so that the positioning of the optical head 3 can be stabilized.
As shown in FIGS. 2A-2C and 3A-3B, the comparator 15 slices the tracking error signal TES at a fixed slice level (a center level Vref of an analog voltage range), and thereby the tracking zero-cross signal TZC is generated.
As shown in FIG. 3A, identification areas (ID) are provided for the tracks formed on the optical disk 2. In each of the identification areas ID (Which are also referred to as "prepit areas"), the guide grooves are broken. Hence, a spike-like noise is superimposed on the tracking error signal TES, as shown in FIG. 3B. The tracking error signal TES is broken when the light beam passes over each of the identification areas ID. Hence, as shown in FIG. 3B, unwanted pulses are included in the tracking zero-cross signal TZC, and prevent track crossing from being precisely followed. As a result, a tracking position error and a speed error are generated.
FIGS. 4A, 4B and 4C are circuit diagrams of the high-speed comparator 15 shown in FIG. 1. The high-speed comparator 15 shown in these figures comprises a hysteresis comparator 150 proposed in Japanese Laid-Open Patent Publication No. 3-36813. The hysteresis comparator shown in FIG. 4A is capable of eliminating noise. The tracking error signal TES is applied to a negative terminal of the comparator and the aforementioned analog reference voltage Vref (DC offset voltage) is applied to a positive terminal thereof via a resistor R3. A resistor R2 connects the positive terminal and an output terminal of the comparator 150 to each other. An output voltage obtained at the output terminal of the comparator 150 is forwardly fed back to the positive terminal via the resistor R2. A positive power supply voltage Vcc and ground potential are applied to the comparator 150. A resistor R1 is connected to the Vcc line and the output terminal of the comparator 150.
The operation of the comparator 15 will now be described with reference to FIGS. 4B and 4C. FIG. 4B is an equivalent circuit diagram of the comparator 15, in which low and high levels of the output signal of the comparator 15 are expressed by a switch. Assuming that the resistance of the resistor R1 is much smaller than the resistances of the resistors R2 and R3, the equivalent circuit shown in FIG. 4B can be rewritten, as shown in FIG. 4C. A potential Vh obtained at a node a when the output signal of the comparator 15 is at a high level can be expressed as follows: ##EQU1## A potential V1 obtained a the node a when the output signal of the comparator 15 is at a low-level can be expressed as follows: ##EQU2## When the analog reference voltage Vref is set to be the center of the range of the voltage Vh, a potential Vh' of the node a obtained when the output voltage is high with respect to the analog reference voltage Vref is written as follows: ##EQU3## A potential V1' of the node a obtained when the output voltage is low with respect to the above analog reference voltage Vref is written as follows: ##EQU4## From the expressions (3) and (4), the potentials Vh' and V1' with respect to the analog reference voltage Vref are equal to each other when Vcc=2.multidot.Vref. In this case, positive and negative hystereses are symmetrical to each other with respect to the analog reference voltage Vref which is the center of the voltage range.
FIGS. 5A and 5B are diagrams showing disadvantages of the comparator 15 shown in FIG. 4A. As shown in FIG. 5A, a servo-zero point of the tracking error signal TES is biased to the analog reference voltage Vref. A hysteresis voltage (output voltage) of the comparator 15 varies so that the output voltage is switched to Vh when the tracking error signal TES becomes lower than the hysteresis voltage, and is switched to V1 when the tracking error signal TES becomes higher than the hysteresis voltage- In this manner, the tracking zero-cross signal TZC is not affected by noise contained in the tracking error signal TES.
In a case where a single-polarity power supply system, such as a 0-5V power supply system is employed, it is necessary to set the analog reference voltage Vref between the ground potential (zero volts) and Vcc (+SV). In this case, the analog reference voltage Vref functions as an analog voltage of zero volt, and analog circuits operate in the plus and minus operation ranges. For example, as shown in FIG. 5B, the analog reference voltage Vref is set equal to 1.8V (analog zero volt) when the ground potential is equal to 0V and the Vcc is equal to +5V. In this case, the plus operation range is not symmetrical with the minus operation range. Hence, as shown in FIG. 5A, a variation in the hysteresis voltage is not symmetrical with respect to the analog reference voltage Vref equal to +5V. Such an asymmetry of the hysteresis voltage with respect to the analog reference voltage results in the following disadvantages.
As shown in FIG. 5A, the positive hysteresis voltage with respect to the analog reference voltage Vref is smaller than the negative hysteresis voltage. A noise which occurs when the tracking error signal TES is negative with respect to the analog reference voltage Vref is detected since the operational margin of the positive hysteresis voltage is small. Hence, the tracking zero-cross signal TZC has an erroneous detection pulse, as shown in FIG. 5A.
If the tracking error signal TES itself has an error (it has an offset on the positive side in the case shown in FIG. 5A), the operational margin with respect to such an offset of the tracking error signal TES is small, and erroneous detection will take place.
In the case where positive and negative power supply systems are employed, analog circuits which operate by means of the positive and negative power supply systems must be used. Further, the positive and negative power supply systems are complex and large size. Hence, a compact optical disk apparatus cannot be produced.